In integrated circuit art, a commonly used method for forming interconnect structures, which include metal lines and vias, is known as “damascene.” Generally, this method involves forming an opening in a dielectric layer using photo lithography and etching techniques. After the formation, the opening is filled with copper or copper alloys. Excess copper on the surface of the dielectric layer is then removed through a Chemical Mechanical Polish (CMP) process. The remaining copper or copper alloy forms metal vias and/or metal lines.
Damascene processes include dual damascene processes and single damascene processes. In a dual damascene process, trenches and via openings are formed first. The via openings are aligned to conductive features such as metal lines in an underlying layer. The trenches and the via openings are then filled in a same metal filling process to form metal lines and vias, respectively. In a single damascene process, metal lines or vias, but not both, are formed.
To form via openings in a dielectric layer, an etching process is performed to expose the underlying metal lines. To prevent excess over-etch that may damage the underlying metal lines, an etch stop layer may be used. The etching process is first stopped on the etch stop layer, and then a different etching gas/chemical is used to etch-through the etch stop layer, so that the underlying metal lines are exposed. Commonly used etch stop materials include silicon nitride, silicon carbide, silicon carbonitride, and the like.